Author (s) :

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1). A. Thiyagarajan, Karpagam Institute of Technology, Coimbatore, Tamilnadu, India, Tamilnadu, India

Abstract :

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In recent days, power electronic converters are necessary in renewable energy applications. The energy storage unit is one of the most important components in renewable energy system such as photo voltaic systems. In such cases, the efficient dc conversion with efficiency is needed. But the conventional boost converter will produces output with high ripple current and ripple voltage. The conventional boost converter needs a high level of duty cycle to produce step up voltage which causes high switching losses in the converter. To overcome this, interleaved technique is used. In this paper, analysis of output ripple voltage of two phase boost dc-dc converter is presented. The converter is tested by varying input voltage at constant duty cycle under zero and 180 degree phase shift of switching pulses. These analysis are carried out by simulation with the help of Matlab/simulink.

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Author (s) :

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1). Chabhadiya Rakeshkumar M., Faculty of PG Studies & Research, Rajkot, Gujarat, INDIA, Gujarat, India
2). Nayan Pedhadiya, Cast and Blower Co. (Guj.) Pvt. Ltd., Rajkot, Gujarat, INDIA, Gujarat, India
3). Sumitkumar Singh, Faculty of PG Studies & Research, Rajkot, Gujarat, INDIA, Gujarat, India

Abstract :

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This paper presents design and analysis of gear drive to run the agriculture centrifugal pump by different input source such as electric motor and input from tractor. In the present work, design and analysis of spur and helical gear drive is carried out to run the centrifugal pump. Static analysis of both gear drive has been performed using ANSYS (WORKBENCH) 14.0 to find the equivalent bending, contact (von-mises) stresses and deformation. Similarly, bending, contact stress and deformation using Lewis and Hertzian equation are calculated which are then compared with static analysis using Ansys. The calculated Ansys results are found to be in close agreement with the theoretical results. Here helical gear is also safe sides so we replaced the spur gear by helical gear to reduced size, weight and temperature of gear drive.

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Author (s) :

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1). Anil Kumar Sahu, SSTC, SSGI (FET), Bhilai, India, India
2). Yogita Tembhre, SSTC, SSGI (FET), Bhilai, India, India

Abstract :

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Modern design of oversampling sigma-delta (S?) ADCs is conferred here. Here in this paper a contemporary design for 8-bit S? oversampling ADC is shown, in which first order oversampling S? modulator and the decimation filter with using 2nd order Cascaded Integrated Comb (CIC) filter is utilized. Transistor level circuit design and response simulation of the sigma-delta ADC with a supply of 1V is presented here. The all design and analysis done by Tanner EDA tool v15.0 using 45nm BSIM4 CMOS technology.

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Author (s) :

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1). Chetan Kapali, BVB college of Engineering & Technology, Hubli, Karnataka, India, Karnataka, India
2). Sahebagowda, B V B College of Engineering & Technology, Hubli, Karnataka, India, Karnataka, India
3). Vinayak Kulkarni, B V B College of Engineering & Technology, Hubli, Karnataka, India

Abstract :

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In the era of competitive environment every manufacturing industry facing problems in terms quality and performance of product and process. Failure in any process operation may result in lack of quality, rework or scrap, hence it is required to think about all possible ways of failure which may occur during the process. Potential failure mode effect analysis is a tool to identify all possible ways of failure, which helps in determining and elimination of failure causes in early stages. In present study of application of failure mode effect analysis in automobile industry, a case study is done on various possible failures occurring during sub-assembly of radiator. It involved study of processes involved in operation, parameters affecting performance and quality of the product and analyzing the potential failures and their causes.

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Author (s) :

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1). Pragati Upadhyay, SSTC, SSGI (FET), Bhilai, India, India
2). Vishal Moyal, SSTC, SSGI (FET), Bhilai, India, India

Abstract :

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This paper describes an energy efficient technique with different kind of adiabatic logic. Inverter can be designed using Complementary metal oxide semiconductor (CMOS) logic, Positive Feedback Adiabatic Logic (PFAL) and Two- Phase Adiabatic Static Clocked Logic (2PASCL). In this paper we have propose adiabatic logic inverter circuit and compare this circuit with the PFAL and 2PASCL logic. Adiabatic logic is a low power circuit, which is a reversible logic it is used to conserve energy. The proposed circuit compares in terms of power consumption using conventional static CMOS and PFAL logic. All design is to be simulated using TANNER EDA tool V15.0. Simulation will be done at BSIM4 90nm technologies.

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Author (s) :

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1). Mr. Mohammed Ismail, The National Institute of Engineering, Mysore, Karnatak, India, India
2). Mr. Ramnag H V, The National Institute of Engineering, Mysore, Karnatak, India, India

Abstract :

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The study is about Statistical process control and process capability analysis for drive pinion component of gear shop line in order to reduce non conformance of products and process variation by identifying the defects and to improvise the process using Cp and Cpk. Statistical process control (SPC) is an important tool used widely at all fields mainly in manufacturing field to monitor the overall operation. SPC can be applied to all kind of manufacturing operations. Statistical process control provides use of the statistical principals and techniques at every stage of the production.

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