Novel design of 8-bit Sigma-Delta ADC using 45nm Technology


Author (s):

  1. Anil Kumar Sahu, SSTC, SSGI (FET), Bhilai, India
  2. Yogita Tembhre, SSTC, SSGI (FET), Bhilai, India, yogitatembhre10@gmail.com

Abstract:

Modern design of oversampling sigma-delta (S?) ADCs is conferred here. Here in this paper a contemporary design for 8-bit S? oversampling ADC is shown, in which first order oversampling S? modulator and the decimation filter with using 2nd order Cascaded Integrated Comb (CIC) filter is utilized. Transistor level circuit design and response simulation of the sigma-delta ADC with a supply of 1V is presented here. The all design and analysis done by Tanner EDA tool v15.0 using 45nm BSIM4 CMOS technology.

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